Download Previous Year Diploma Paper of VLSI System Design 6th Sem ECE/EEE/6188/Feb 2021 Diploma Paper
VLSI System Design 6th Sem ECE/EEE/6188/Feb 2021 Diploma Paper
Duration: 1.15Hrs.                                 M.Marks:25
                   SECTION-A
Q2. Attempt any THREE questions.                          3×5=15
i. Discuss the features of VHDL.
ii. Write down the VHDL code for half adder circuit.
iii. Write down the difference between concurrent and sequential statement.
iv. Explain the concept of CPLD.
v. Discuss in brief about concurrent statement.
vi. Explain the if-then-elsif conditional statement in VHDL programming.
vii. Write a short note on operator overloading.
                   SECTION-B
Q3. Attempt any three questions.                            3×10=30
- Â What are the advantages and disadvantages of Optical Fiber Communication.
- List the various types of LED’s. Discuss the various types of LED structures.
- Describe Optical Power Budgeting ?
- What is the need of an Optical Amplifier? Discuss SOA.
- Explain the different types of losses in Optical Fibre Communication.
- Write short notes on (any two)
- Effect of dispersion on data Rate
- WDM
- Historical perspective of Optical Communication
Features of VHDL.
VHDL code for half adder circuit.
Difference between concurrent and sequential statement.
Concept of CPLD.
 Concurrent statement.
 if-then-elsif conditional statement in VHDL programming.
Short note on operator overloading.
VLSI System Design 6th Sem ECE/EEE/6188/Feb 2021 DiplomaPaper Click Here
Combinational circuit for 3:8 decoder using VHDL.
Different operators used in VHDL.
Different modelling techniques used in VHDL.
Delay and various types of delay used in VHDL.
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